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DTSTART;TZID=America/Denver:20231112T113800
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UID:submissions.supercomputing.org_SC23_sess414_ws_hust111@linklings.com
SUMMARY:MSR-genie:  Navigating Model Specific Registers across Processor G
 enerations
DESCRIPTION:Workshop\n\nKyle Fan, Barry Rountree, Tapasya Patki, Aniruddha
  Marathe, and Stephanie Brink (Lawrence Livermore National Laboratory (LLN
 L)); Duncan McFarlane (Portland State University, Lawrence Livermore Natio
 nal Laboratory (LLNL)); and Eric Green and Kathleen Shoga (Lawrence Liverm
 ore National Laboratory (LLNL))\n\nPerformance tuning of High-Performance 
 Computing (HPC) applications depends on sophisticated tuning of parameters
  on diverse architectures. These parameters are made available by vendors 
 through low-level dials such as Model-Specific Registers (MSRs). While the
  MSRs themselves provide a powerful mechanism for users to monitor and con
 trol processor features, accessing them is laborious due to lack of standa
 rd interfaces and clear documentation. As a result, the burden of determin
 ing which MSRs to consider and how to fine-tune them for an application li
 es on the end user. \n\nWe present MSR-genie, an efficient and extensible 
 query tool which reduces this user-level burden and allows them to query b
 idirectionally across MSR lists as well as a processor families and models
 , and providing them with guidance on appropriate bitmasks. The MSR-genie 
 tool is open-source and easily extensible, and we demonstrate its effectiv
 eness with over thirty Intel processor models and over two-thousand unique
  MSRs.\n\nTag: Programming Frameworks and System Software\n\nRegistration 
 Category: Workshop Reg Pass\n\nSession Chairs: Chris Bording (University o
 f Western Australia); Elsa J. Gonsiorowski (Lawrence Livermore National La
 boratory (LLNL)); Lev Gorenstein (Globus, University of Chicago); and Kare
 n Tomko (Ohio Supercomputer Center)
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