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DTSTART:19700308T020000
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DTSTAMP:20240116T191656Z
LOCATION:505
DTSTART;TZID=America/Denver:20231112T171000
DTEND;TZID=America/Denver:20231112T172900
UID:submissions.supercomputing.org_SC23_sess428_ws_ipdrm104@linklings.com
SUMMARY:A gem5 Implementation of the Sequential Codelet Model: Reducing Ov
 erhead and Expanding the Software Memory Interface
DESCRIPTION:Workshop\n\nDawson Fox (University of Delaware, Argonne Nation
 al Laboratory (ANL)); Jose Monsalve Diaz (Argonne National Laboratory (ANL
 )); and Xiaoming Li (University of Delaware)\n\nModern tasking models defi
 ne applications in a fine-grained manner that necessitates lower overhead 
 per segment of computation. While previous work has seen implementations o
 f hardware support for tasking models, many lack the support required by h
 eterogeneity and fall short of expanding memory interfaces for data-centri
 c needs and memory utilization. In this paper, we propose and implement a 
 hardware support scheme of the sequential codelet model (SCM). The hardwar
 e support makes it possible to demonstrate SCM’s potential advantage on he
 terogeneous workloads and capability of supporting the expanding software 
 memory interface. The gem5 implementation of the Sequential Codelet Model 
 functions as a foundation to demonstrate the benefits offered by the SCM p
 rogram execution model by moving hardware support closer to program semant
 ics. We compare the overhead with DARTS, a software implementation of the 
 Codelet Model that has been shown to be useful for fine-grained execution,
  and show a 20x reduction in overhead.\n\nTag: Distributed Computing, Midd
 leware and System Software, Runtime Systems\n\nRegistration Category: Work
 shop Reg Pass\n\nSession Chairs: Barbara Chapman (Hewlett Packard Enterpri
 se (HPE), Stony Brook University); Joseph Manzano (Pacific Northwest Natio
 nal Laboratory (PNNL)); Shirley Moore (University of Texas, El Paso); EunJ
 ung (EJ) Park (Qualcomm Inc); and Joshua Suetterlein (Pacific Northwest Na
 tional Laboratory (PNNL))
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