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UID:submissions.supercomputing.org_SC23_sess434_ws_ftxs102@linklings.com
SUMMARY:Evaluating the Resiliency of Posits for Scientific Computing
DESCRIPTION:Benjamin Schlueter, Jon Calhoun, and Alexandra Poulos (Clemson
  University)\n\nIEEE-754 is the de-facto standard for the implementation o
 f floating point number systems in hardware, although recently, posits hav
 e been proposed as a drop-in replacement. Recent work has suggested that p
 osits can offer greater numerical accuracy and reproducibility than IEEE-7
 54-compliant floating point numbers at a comparable architectural cost. Th
 ere have been several studies that consider the use of posits and other fl
 oating-point implementations in hardware and software, but there is limite
 d work examining this new number system from a reliability perspective. In
  this paper, we evaluate the resiliency of posits to inform hardware desig
 n for fault-tolerant systems. Our analysis breaks down the impact of bit f
 lips on the various fields within both floating-point standards. After exa
 mining the patterns and quirks regarding bit flip error in posits, we conc
 lude that posits offer superior resiliency than the IEEE-754 standard in t
 he majority of cases.\n\nTag: Fault Handling and Tolerance, Large Scale Sy
 stems\n\nRegistration Category: Workshop Reg Pass\n\nSession Chairs: John 
 Daly (US Department of Defense), Scott Levy (Sandia National Laboratories)
 , and Keita Teranishi (Oak Ridge National Laboratory (ORNL))\n\n
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