Contributor

Maria is Senior Member of the Technical Staff at AMD. Prior to joining AMD, she was an HPC Engineer at Intel responsible for RAS system validation for the US DOE Aurora Exascale Supercomputer (A21). She has experience in cluster integration, validation, and execution in HPC, and extensive Software Engineering experience supporting mission and safety critical applications for the Automotive industry in the US and Mexico. She has published research in the areas of fault-tolerance for massively-parallel-processing, large-scale systems and on emerging non-volatile memories for embedded systems. Maria is a member of the SC23 Inclusivity and Digital Experience committees. Maria holds a M.Sc. in Computer Science from University of Delaware.