Contributor

Samuel Williams is a senior scientist in the Performance and Algorithms Research Group at the Lawrence Berkeley National Laboratory (LBNL). His research interests include high-performance computing, performance modeling, auto-tuning, computer architecture, and hardware/software co-design. Dr. Williams received his Ph.D. in Computer Science from the University of California at Berkeley (UCB) in December of 2008. During this period, his doctoral research focused on multicore architectures and automated performance tuning. To that end, he created the Roofline Model to enable developers, computer scientists, computer architects, and applied mathematicians to quickly and visually assess performance bottlenecks on multicore, manycore, and GPU-accelerated systems. Previously, within the IRAM project, he implemented the RTL for the integer and floating-point datapaths, verified the simulators and all RTL, floor-planned the entire VIRAM1 chip, and performed all necessary place-and-route (PnR) work.